Activities in Conferences

General Chair of the IEEE VLSI Test Symposium, 2012 (Hawaii)


  • General Chair of the IEEE VLSI Test Symposium (VTS), Maui (Hawai), April 23-25, 2012
  • General Chair of the IEEE VLSI Test Symposium (VTS), Dana Point (California), May 2-5, 2011
  • General Co-Chair of the 12th IEEE International On-Line Testing Symposium (IOLTS), July 10-12, Lake of Como (Italy), 2006
  • General Co-Chair of The 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTS), Monterey (California, USA), October 3-5, 2005
  • General Co-Chair of the 7th IEEE International On-Line Testing Workshop, July 9-11, Giardini Naxos-Taormina (Italy), 2001
  • General Co-Chair of The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTS), November 1-3, 1999, Albuquerque (New Mexico)
  • Vice-General Co-Chair of the IEEE VLSI Test Symposium (VTS), Santa Cruz (California), April 18-21, 2010
  • Vice-General Chair of the 13th IEEE International On-Line Testing Symposium (IOLTS), July 9-11, Crete (Greece), 2007
  • Program Chair of the IEEE VLSI Test Symposium (VTS), Santa Cruz (California), May 3-7, 2009
  • Program Co-Chair of the 1st IEEE International Workshop on Design and Test of Nano Devices, Circuits and Systems (NDCS), Boston (MA), September 29-30, 2008
  • Program Co-Chair of the IEEE VLSI Test Symposium (VTS), San Diego (California), 2008
  • Program Co-Chair of the 11th IEEE International On-Line Testing Symposium (IOLTS), July 6-8, Cote Azur (France), 2005
  • Program Co-Chair of the 10th IEEE International On-Line Testing Symposium (IOLTS), July 12-14, Madeira (Portugal), 2004
  • Program Co-Chair of the 9th IEEE International On-Line Testing Symposium (IOLTS), July 7-9, Kos (Greece), 2003
  • Program Co-Chair of the 8th IEEE International On-Line Testing Workshop, July 8-10, Isle of Bendor (France), 2002
  • Program Co-Chair of The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTS), November 2-4, 1998, Austin (Texas)
  • Vice-Program Chair of the 14th IEEE International On-Line Testing Symposium (IOLTS), July 7-9, 2008, Rhodes (Greece)Vice-General Chair of the 13th IEEE International On-Line Testing Symposium (IOLTS), July 9-11, Crete (Greece), 2007
  • Vice-Program Chair of the 6th IEEE International On-Line Testing Workshop, July 3-5, 2000, Maiorca (Spain)
  • Vice-Program Co-Chair of the 5th IEEE International On-Line Testing Workshop, July 5-7, 1999, Rhodes (Greece)
  • Vice-Program Co-Chair of the 4th IEEE International On-Line Testing Workshop, July 6-8, 1998, Capri (Italy)
  • Past Chair of the IEEE VLSI Test Symposium (VTS), Berkeley (California), April 29 – May 2, 2013
  • Member of the Steering Committee of the IEEE World Forum on Internet of Things (2015-present)
  • Member of the Steering Committee of The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (2001-present)
  • Member of the Steering Committee of the ACM Computing Frontiers Conference (2003-2012)
  • Track Chair for Test of the Design, Automation and Test in Europe Conference (DATE), 2016, Dresden (Germany), March 14-18, 2016
  • Track Chair for the PhD Forum of the Design, Automation and Test in Europe Conference (DATE), 2018, Dresden (Germany), 2018
  • Track Chair for the PhD Forum of the Design, Automation and Test in Europe Conference (DATE), 2017, Lausanne (Switzerland), 2017
  • Track Chair for Test of the Design, Automation and Test in Europe Conference (DATE), 2015, Grenoble (France), March 9-13, 2015
  • Track Chair for Test and Reliability of the Design, Automation and Test in Europe Conference (DATE), 2014, Dresden (Germany), March 24-28, 2014
  • Topic Coordinator for "Product Test” of the:
    • IEEE International Test Conference (ITC) 2013, Anaheim (California), September 10-12, 2013
    • IEEE International Test Conference (ITC) 2012, Anaheim (California), November 4-9, 2012
    • IEEE International Test Conference (ITC) 2011, Anaheim (California), September 18-23, 2011
  • Topic Coordinator for "On-Line Test” of the:
    • IEEE International Test Conference (ITC) 2010, Austin (Texas), October 31- November 5, 2010
    • IEEE International Test Conference (ITC) 2009, Austin (Texas), November 3-5, 2009
    • IEEE International Test Conference (ITC) 2008, Santa Clara (California), October 28-30, 2008
    • IEEE International Test Conference (ITC) 2007, Santa Clara (California), October 23-25, 2007
  • Topic Coordinator for "On-Line Test", for "Fault Models” and for “Design For Availability” of the:
    • IEEE International Test Conference (ITC) 2006, Santa Clara (California), October 22-27, 2006
    • IEEE International Test Conference (ITC) 2005, Austin (Texas), 6-10 November, 2005
    • IEEE International Test Conference (ITC) 2004, Charlotte (NC), 26-28 October, 2004
  • Topic Coordinator for "On-Line Test" and for "Fault Models” of the:
    • International Test Conference (ITC) 2003, Charlotte (NC), 30 September - 2 October, 2003
    • International Test Conference (ITC) 2002, Baltimore (MD), October 8-10, 2002
    • International Test Conference (ITC) 2001, Baltimore (MD), 30 October - 1 November, 2001
    • International Test Conference (ITC) 2000, Atlantic City (NJ), 3-5 October, 2000
  • Program Committee Chair of The First International Conference on Advances in System Testing and Validation Lifecycle (VALID) 2009, Porto (Portugal), September 20-25, 2009
  • Topic Chair/Co-Chair for:
    • "On-line test, fault tolerance, reliability, dependability and functional safety" of the European Test Symposium (ETS) in 2017 (Cyprus, Greece, May 22-25, 2017)
    • "On-line Testing and Reliability" of the European Test Symposium (ETS) in 2013 (Avignon, France, 27-31 May, 2013) and in 2012 (Annecy, France, May 28-June 1, 2012)
    • "On-line Testing and Fault Tolerance" of the Design, Automation and Test in Europe (DATE) Conference in 2013 (Grenoble, France, March 18-22, 2013) and in 2012 (Dresden, Germany, March 12-16, 2012)
    • "Testing" of the ACM/IEEE Great Lakes Symposium on VLSI (GLS-VLSI) in 2010 (Providence, MA, May, 2010), in 2009 (Boston, MA, May 10-12, 2009) and in 2008 (Orlando, FL, May 4-6, 2008)
    • "On-line Testing, Fault Tolerance and Reliability" of the Design, Automation and Test in Europe (DATE) Conference in 2011 (Grenoble, France, March 14-18, 2011), in 2007 (Nice, France, April 16-20, 2007), in 2006 (Munich, Germany, March 6-10, 2006) and in 2005 (Munich, Germany, March 7-11, 2005)
    • "Field-Oriented Test and On-line Testing" of the Design, Automation and Test in Europe (DATE) Conference, Paris (France), February 16-20, 2004
    • "On-line Testing and Fault Tolerance" of the European Test Symposium (ETS) in 2007 (Freiburg Germany, May 20-24, 2007) and in 2006 (Southampton, England, May 21-25, 2006)
  • European Liaison of the 8th IEEE International Workshop on Silicon Debug and Diagnosis (SDD), Anaheim, California, 8-9 November, 2012
  • Publication Chair of the:
    • IEEE European Test Symposium (ETS), Trondheim (Norway), May 23-27, 2011
    • IEEE European Test Symposium (ETS), Prague (Czech Republic), May 25-28, 2010
    • European Test Symposium (ETS), Seville (Spain), May 24-28, 2009
    • European Test Symposium (ETS), Lake Maggiore (Italy), May 25-29, 2008
  • Publicity Co-Chair of the IEEE VLSI Test Symposium, Palm Springs (CA), May 1-5, 2005
  • Special Sessions Co-Chair of the:
    • IEEE VLSI Test Symposium, Berkeley (CA), May 6 – 10, 2007
    • IEEE VLSI Test Symposium, Berkeley (CA), April 30 – May 4, 2006
  • Member of the Technical Program Committee of the following International Conferences:
    • IEEE Latin-American Test Symposium (LATS), São Paulo (Brazil), March 13 – 15, 2018
    • IEEE European Test Symposium (ETS), Bremen (Germany), May 28-June 1, 2018
    • The 26th Asian Test Symposium (ATS17), Taipei (Taiwan), November 27-30, 2017
    • IEEE International Symposium on On-Line Testing and Robust System Design 2017 (IOLTS 2017), Thessaloniki (Greece), July 3-5, 2017
    • IEEE Latin-American Test Symposium (LATS), Bogota (Colombia), March 13 – 15, 2017
    • IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Cambridge (UK), October 30 – November 1, 2017
    • IEEE European Test Symposium (ETS), Cyprus (Greece), May 22-25, 2017
    • The 25th Asian Test Symposium (ATS16), Hiroshima (Japan), November 21-24, 2016
    • IEEE International Symposium on On-Line Testing and Robust System Design 2016 (IOLTS 2016), Sant Feliu de Guixols (Spain), July 4-6, 2016
    • IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Storrs (Connecticut, USA), September 19-20, 2016
    • IEEE Latin-American Test Symposium (LATS), Foz do Iguacu (Brasil), 6-8 Aprile, 2016
    • European Test Symposium (ETS), Amsterdam (The Netherlands), 23-27 May, 2016
    • IEEE 2nd World Forum on Internet of Things, December 14-16, 2015, Milan (Italy)
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Amherst (Massachusetts), October 12-14, 2015
    • 21st IEEE International On-Line Testing Symposium, July 6-8, 2015, Halkidiki (Greece)
    • European Test Symposium (ETS), Cluj-Napoca (Romania), 25-29 May, 2015
    • 20th IEEE International On-Line Testing Symposium, Platja d'Aro (Spain), July 7-9, 2014
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Amsterdam, (The Netherlands), October 1-3, 2014
    • The 23rd Asian Test Symposium (ATS11), Hangzhou, Zhejiang (China), November 16-19, 2014
    • European Test Symposium (ETS), Paderborn (Germany), 26-30 May, 2014
    • The 22nd Asian Test Symposium (ATS11), Yilan (Taiwan), Nov. 18-21, 2013
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, New York (USA), October 2-4, 2013
    • 19th IEEE International On-Line Testing Symposium, Chania (Greece), July 8-10, 2013
    • The 21st Asian Test Symposium (ATS11), Niigata (Japan), Nov. 19-22, 2012
    • 18th IEEE International On-Line Testing Symposium, Sitges (Spain), June 27-29, 2012
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Austin (Texas), October, 2012
    • 17th IEEE International On-Line Testing Symposium, Athens (Greece), July 13-15, 2011
    • The 20th Asian Test Symposium (ATS11), New Delhi (India), November 21-23, 2011
    • The 21th International Conference on Field Programmable Logic and Applications, Chania (Greece), September 5 - 7, 2011
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Vancouver (Canada), October 3-5, 2011
    • 1st Workshop on System Validation and Computer Architecture, San José (California), June 4, 2011
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Kyoto (Japan), October 6-8, 2010
    • The Second International Conference on Advances in System Testing and Validation Lifecycle (VALID) 2010, Nice (France), 22-27 August, 2010
    • 4th Workshop on Dependable and Secure Nanocomputing, Chicago (IL, USA), June 28, 2010
    • The 16th IEEE International On-Line Testing Symposium 2010 (IOLTS 2010), Corfù (Greece), July 5-7, 2010
    • IEEE European Test Symposium (ETS), Prague (Czech Republic), May 25-28, 2010
    • The 20th International Conference on Field Programmable Logic and Applications (FPL), Milan (Italy), August 31 – September 2, 2010
    • IEEE International Workshop on Reliability Aware System Design and Test (RASDAT’10), Bangalore (India), January 7-8, 2010
    • 6h IEEE International Workshop on Silicon Debug and Diagnosis (SDD10), Dresden (Germany), March 12, 2010
    • Design, Automation and Test in Europe (DATE) Conference, Dresden (Germany), March 8-12, 2010
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Chicago (IL, USA), October 7-9, 2009
    • IEEE International Workshop on Memory Technology, Design, and Testing (MTDT), Hsinchu (Taiwan), 31 August – 2 September, 2009
    • 15th Annual IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW), Scottsdale (Arizona), June 10-12, 2009
    • European Test Symposium (ETS), Seville (Spain), May 24-28, 2009
    • 15th IEEE International On-Line Testing Symposium, Sesimbra-Lisbon (Portugal), June 24-27, 2009
    • Design, Automation and Test in Europe (DATE) Conference, Nice (France), April 20-24, 2009
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Cambridge-Boston (USA), October 1-3, 2008
    • 14th Annual IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW), Vancouver (Canada), June 18-20, 2008
    • 5th IEEE International Workshop on Silicon Debug and Diagnosis (SDD07), San Diego (California), April 30 – May 1, 2008
    • Design, Automation and Test in Europe (DATE) Conference, Munich (Germany), March 10-14, 2008
    • European Test Symposium (ETS), Lake Maggiore (Italy), May 25-29, 2008
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Rome (Italy), September 26-28, 2007
    • “IEEE/ACM International Symposium on Nano Scale Architectures (Nanoarch’07)", San Josè (California), October 21-22, 2007
    • IEEE VLSI Test Symposium, Berkeley (California), May 6—10, 2007
    • 2nd IEEE International Workshop on Design for Manufacturability and Yield (DFM&Y 2007), Santa Clara (CA), October 25-26, 2007
    • 4th IEEE International Workshop on Silicon Debug and Diagnosis (SDD07), Freiburg (Germany), May 23 – 24, 2007
    • 1st IEEE International Workshop on Design for Manufacturability & Yield (DFM&Y 2006), Santa Clara (California), October 26 – 27, 2006
    • 43rd Design Automation Conference, San Francisco (California), July 24 – 28, 2006
    • IEEE VLSI Test Symposium, Berkeley (California), April 30 – May 4, 2006
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Washington DC (USA), October 4-6, 2006
    • 4th IEEE International Workshop on Infrastructure IP (I-IP), Berkeley, California, USA, May 4-5, 2006
    • 3rd IEEE International Workshop on Silicon Debug and Diagnosis (SDD06), Santa Clara (California), October 27 – 28, 2006
    • IEEE International Workshop on Memory Technology, Design, and Testing (MTDT), Tapei (Taiwan), August 3 – 5, 2005
    • 2nd IEEE International Workshop on Silicon Debug and Diagnosis (SDD05), Austin (Texas), November 10 – 11, 2005
    • IEEE VLSI Test Symposium, Palm Springs (California), May 1 – 4, 2005
    • IEEE European Test Symposium, Talin (Estonia), May 22 – 25, 2005
    • The 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Cannes (France), 10 – 13 October, 2004
    • IEEE International Workshop on Memory Technology, Design, and Testing (MTDT), San Josè (CA), August 9 – 10, 2004
    • IEEE European Test Symposium, Ajaccio, Corsica (France), May 23 – 26, 2004
    • 3rd IEEE International Workshop on Infrastructure IP (I-IP), Palm Springs, California, USA, May 4-5, 2005
    • 2nd IEEE International Workshop on Infrastructure IP (I-IP), Charlotte, North Carolina, USA, October 28-29, 2004
    • 1st IEEE International Workshop on Silicon Debug and Diagnosis (SDD04), Ajaccio, Corsica (France), May 26 – 27, 2004
    • IEEE VLSI Test Symposium, Napa (California), April 26 – 29, 2004
    • ACM Computing Frontiers Conference, Ischia (Italy), April 14-16, 2004
    • IEEE VLSI Test Symposium, Napa (California), April 27 - May 1, 2003
    • IEEE European Test Workshop, Maastricht (The Netherlands), May 25 - 28, 2003
    • Design, Automation and Test in Europe (DATE) Conference, Munich (Germany), March 3-7, 2003
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Boston (MA), November, 2003
    • 1st IEEE International Workshop on Infrastructure IP (I-IP), Charlotte, North Carolina, USA, October 2-3, 2003
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Vancouver (British Columbia), November 6-8, 2002
    • Design, Automation and Test in Europe (DATE) Conference, Paris (France), March 4-8, 2002
    • IEEE International Workshop on Yield Optimization & Test, Baltimore (MD, USA), November 1-2, 2001
    • Design, Automation and Test in Europe (DATE) Conference, Munich (Germany), March 13-16, 2001
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, San Francisco (CA), October 24-26, 2001
    • IEEE International Workshop on Yield Optimization & Test, Atlantic City (NJ), October5-6, 2000
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Mt. Fuji (Japan), October 25-27, 2000
    • Design, Automation and Test in Europe (DATE) Conference, Paris (France), March 27-30, 2000
    • 3rd IEEE International On-Line Testing Workshop, Crete (Greece), July 7-9, 1997
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Paris (France), October 20-22, 1997
    • 2nd IEEE International On-Line Testing Workshop, Saint-Jean de-Luz, Biarritz (France), July 8-10, 1996
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Boston, Massachussets (USA), November 6-8, 1996
    • The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, Lafayette (Louisiana), November 13-15, 1995
  • Co-organizer of the following panels:
    • “Reliability Issues for Very Deep Submicron ICs", of the 8th IEEE International On-Line Testing Workshop, July 8-10, 2002, Isle of Bendor (France). The panel has been co-organized also with the international magazine IEEE Design & Test
    • “Fault-Tolerance: needs and perspectives", of the IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, November 2-4, 1998, Austin (Texas). The panel has been co-organized also with the international magazine IEEE Design & Test
    • “Yield, Testing and Reliability Issues for Very Deep Submicron Chips", of the IEEE International On-Line Testing Workshop, July 9-11, 2001, Giardini Naxos-Taormina (Italy). The panel has been co-organized also with the international magazine IEEE Design & Test
  • Organizer of the following Special Sessions:
    • “Fault Tolerance Techniques for Memory Reliability Improvement” for the IEEE International Workshop on Memory Technology, Design, and Testing (MTDT), San Josè (CA), August 9 – 10, 2004
    • “Robust Design Techniques for Soft Errors” for the IEEE International On-Line Testing Symposium, Saint Raphael (France), July 6 – 8, 2005
    • “Memory Reliability Challenges” for the IEEE International On-Line Testing Symposium, Lake of Como (Italy), July 10 – 12, 2006
    • “Test and Reliability Challenges for Innovative Systems” for the IEEE International On-Line Testing Symposium, Saint Raphael (France), July 6 – 8, 2006
  • Session Chair-Moderator for the following International Conferences:
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Vancouver (Canada), October 3-5, 2011
    • Design, Automation and Test in Europe (DATE) Conference, Grenoble (France), March 14-18, 2011
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Kyoto (Japan), October 6-8, 2010
    • IEEE East-West Design & Test International Symposium, Moscow (Russia), September 18-21, 2009
    • “International Test Conference”, Santa Clara (California, USA), October 28-30, 2008 (session 12)
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Rome (Italy), September 26-28, 2007, IEEE VLSI Test Symposium, Berkeley (CA), May 6 – 10, 2007
    • Design, Automation and Test in Europe (DATE) Conference, Nice (France), April 16-20, 2007
    • 43rd Design Automation Conference, San Francisco (California), July 24 – 28, 2006
    • 12th IEEE International On-Line Testing Symposium, July 10-12, Lake of Como (Italy), 2006
    • IEEE VLSI Test Symposium, Berkeley (California), April 30 – May 4, 2006
    • 9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS’06), Prague (Czech Republic), April 18 – 21, 2006
    • IEEE VLSI Test Symposium, Palm Springs (California), May 1 – 4, 2005
    • IEEE International Workshop on Memory Technology, Design, and Testing (MTDT), San Josè (CA), August 9 – 10, 2004
    • Design, Automation and Test in Europe (DATE) Conference, Munich (Germany), March 6-11, 2005
    • The 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Cannes (France), 10 – 13 October, 2004
    • 2nd IEEE International Workshop on Infrastructure IP (I-IP), Charlotte, North Carolina, USA, October 28-29, 2004
    • IEEE VLSI Test Symposium, Napa (California), April 26 – 29, 2004
    • ACM Computing Frontiers Conference, Ischia (Italy), April 14-16, 2004
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Boston (MA), November, 2003
    • 1st IEEE International Workshop on Infrastructure IP (I-IP), Charlotte, North Carolina, USA, October 2-3, 2003
    • IEEE European Test Workshop, Maastricht (The Netherlands), May 25 - 28, 2003
    • IEEE International Workshop on Memory Technology, Design and Testing, Isle of Bendor (France), July 10-12, 2002
    • 8th IEEE International Mixed Signal Testing Workshop, Montreux (Switzerland), June 18-21, 2002
    • IEEE European Test Workshop, Corfù (Greece), May 26-29, 2002
    • 20th IEEE VLSI Test Symposium, Monterey (California), April 28 - May 1, 2002
    • 4th International Conference on Massively Parallel Computing Systems (MPCS), Ischia (Italy), April 10-12, 2002
    • Design, Automation and Test in Europe (DATE) Conference, Paris (France), March 13-16, 2001
    • 18th IEEE VLSI Test Symposium, Montreal (Canada), April 30 - May 4, 2000
    • IEEE International Workshop on Yield Optimization & Test, Atlantic City (NJ), October 5-6, 2000
    • 6th IEEE International On-Line Testing Workshop, Maiorca (Spain), July 3-5, 2000
    • 5th IEEE International On-Line Testing Workshop, Rhodes (Greece), July 5-7, 1999 16th IEEE VLSI Test Symposium, Monterey (California), April 26-30, 1998 3rd IEEE International On-Line Testing Workshop, Crete (Greece), July 7-9, 1997
    • The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Paris (France), October 20-22, 1997

https://events.unibo.it/cecilia-metra-2018-ieee-computer-society-president-elect-candidate